The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for interconnecting layers in a semiconductor device, wherein a contact window is opened by a different etching method to make interlayer contact resistance uniform.
To attain high-speed operation, enhanced performance, and miniaturization in electrical appliances, efforts to increase the packing density in semiconductor memory devices have been accelerated. Further miniaturization and compact arrangement of elements provide the potential for higher integration in semiconductor devices. Accordingly, techniques are required which can shrink both the spacing between conductive layers connecting respective elements as well as their sizes, and which also can form the conductive layers on multiple layers (multilevel interconnection), which were in the past formed on a single layer.
FIGS. 1A, 1B, and 1C are sectional views for illustrating a conventional method for interconnecting layers in a semiconductor device, which can achieve reliable interconnection between conductive layers with minimum linewidths.
First, pure aluminum or an aluminum alloy in conjunction with a material such as 1% silicon, 0.5% copper, or 1% Si plus 0.5% Cu is deposited on a semiconductor substrate 10 to form a first conductive layer 100a. Then, after forming a second conductive layer 100b by depositing titanium nitride (TiN) on the first conductive layer, a lower conductive layer 100 is formed by patterning the first and second conductive layers through a photolithography process.
Since aluminum alloy or pure aluminum used as the first conductive layer has high reflexibility, which makes it difficult to form a minute pattern, titanium nitride is used as the second conductive layer to overcome the difficulty in the photolithography process due to decreased linewidth and spacing and increased stepped structure of the conductive layers. Removing these difficulties, which result from higher packing density, improves the reliability of the first conductive layer. That is to say, in the photolithography process that coats a photoresist layer over the whole surface of the first conductive layer 100a to expose and develop it, a small quantity of light projected during the exposure arrives at the first conductive layer with high reflexibility. As a result the light is reflected and diffused by the uneven surface of the conductive layer due to fine defects such as hillocks or voids, and projected again onto the photoresist layer which becomes unacceptably exposed.
As one solution to the difficulty in forming a minute pattern caused by the diffused reflection of light, a material having low reflexibility, such as titanium nitride, is used to cap the first conductive layer which protects the photoresist pattern from being damaged by diffused reflection. The titanium nitride capping also prevents the occurrence of fine defects such as hillocks and voids on the first conductive layer's surface. Generally, when a lower conductive layer consists solely of the first conductive layer, the conductive material (especially its surface) freely migrates while melting and recombining the aluminum ions of the first conductive layer, causing the hillocks and voids. However, the titanium nitride used as the second conductive layer controls the migration of the conductive material, and thus enables the prevention of fine defects.
The method for interconnecting layers additionally involves forming an inter-insulating layer 20 to planarize the whole surface of the resultant structure having the lower conductive layer 100 thereon and forming the inter-insulating layer 20 involves successively by coating an insulating material including an oxide layer of High Temperature Oxide (HTO) or Tetra-Ethyl-OrthoSilicate (TEOS) layer, and a Spin-On-Glass (SOG) layer (FIG. 1A). A photoresist pattern 72 is formed on the inter-insulating layer 20, in which a window is opened to expose a portion of the inter-insulating layer where a contact window will be formed. Then, an isotropic etching is performed on the inter-insulating layer 20 to remove a predetermined amount of the inter-insulating layer. A contact window 9 is formed by partially removing the inter-insulating layer and titanium nitride by means of a Plasma Ion Etching (PIE) or Reactive Ion Etching (RIE) method using a fluorine mixture (CF.sub.4, CHF.sub.3, etc.).
During this, since the bonding energy between titanium (Ti) ions and nitride (N) ions constituting the titanium nitride is approximately double the bonding energy between aluminum ions, a non-volatile compound (AlxFy) 50 is formed by the reaction of fluorine (F) ions present in the fluorine mixture used as the etching gas, with the aluminum (Al) ions included in the first conductive layer. The non-volatile compound 50 accumulates in the contact window 9 as illustrated in FIG. 1B. However, the non-volatile compound accumulated in the contact window is not easily removed by an O.sub.2 plasma or an argon sputtering (Ar sputtering) method, so that the contact resistance between the upper conductive layer 200 and lower conductive layer 100 connected through contact window 9 (FIG. 1C) becomes irregular. This degrades the device's reliability.